Operating Systems: Internals and Design Principles, 7/E solutions manual and test bank Stallings
Table 3.1 Reasons for Process Creation
New batch job The OS is provided with a batch job control stream, usually on tape or disk. When the OS is prepared to take on new work, it will read the next sequence of job control commands.
Interactive logon A user at a terminal logs on to the system.
Created by OS to provide a service The OS can create a process to perform a function on behalf of a user program, without the user having to wait (e.g., a process to control printing).
Spawned by existing process For purposes of modularity or to exploit parallelism, a user program can dictate the creation of a number of processes.
Table 3.2 Reasons for Process Termination
Normal completion The process executes an OS service call to indicate that it has completed running.
Time limit exceeded The process has run longer than the specified total time limit. There are a number of possibilities for the type of time that is measured. These include total elapsed time ("wall clock time"), amount of time spent executing, and, in the case of an interactive process, the amount of time since the user last provided any input.
Memory unavailable The process requires more memory than the system can provide.
Bounds violation The process tries to access a memory location that it is not allowed to access.
Protection error The process attempts to use a resource such as a file that it is not allowed to use, or it tries to use it in an improper fashion, such as writing to a read-only file.
Arithmetic error The process tries a prohibited computation, such as division by zero, or tries to store numbers larger than the hardware can accommodate.
Time overrun The process has waited longer than a specified maximum for a certain event to occur.
I/O failure An error occurs during input or output, such as inability to find a file, failure to read or write after a specified maximum number of tries (when, for example, a defective area is encountered on a tape), or invalid operation (such as reading from the line printer).
Invalid instruction The process attempts to execute a nonexistent instruction (often a result of branching into a data area and attempting to execute the data).
Privileged instruction The process attempts to use an instruction reserved for the operating system.
Data misuse A piece of data is of the wrong type or is not initialized.
Operator or OS intervention For some reason, the operator or the operating system has terminated the process (e.g., if a deadlock exists).
Parent termination When a parent terminates, the operating system may automatically terminate all of the offspring of that parent.
Parent request A parent process typically has the authority to terminate any of its offspring.
Table 3.3 Reasons for Process Suspension
Swapping The OS needs to release sufficient main memory to bring in a process that is ready to execute.
Other OS reason The OS may suspend a background or utility process or a process that is suspected of causing a problem.
Interactive user request A user may wish to suspend execution of a program for purposes of debugging or in connection with the use of a resource.
Timing A process may be executed periodically (e.g., an accounting or system monitoring process) and may be suspended while waiting for the next time interval.
Parent process request A parent process may wish to suspend execution of a descendent to examine or modify the suspended process, or to coordinate the activity of various descendants.
Table 3.4 Typical Elements of a Process Image
User Data
The modifiable part of the user space. May include program data, a user stack area, and programs that may be modified.
User Program
The program to be executed.
Stack
Each process has one or more last-in-first-out (LIFO) stacks associated with it. A stack is used to store parameters and calling addresses for procedure and system calls.
Process Control Block
Data needed by the OS to control the process (see Table 3.5).
Table 3.5 Typical Elements of a Process Control Block (page 1 of 2)
Process Identification
Identifiers
Numeric identifiers that may be stored with the process control block include
•Identifier of this process
•Identifier of the process that created this process (parent process)
•User identifier
Processor State Information
User-Visible Registers
A user-visible register is one that may be referenced by means of the machine language that the processor executes while in user mode. Typically, there are from 8 to 32 of these registers, although some RISC implementations have over 100.
Control and Status Registers
These are a variety of processor registers that are employed to control the operation of the processor. These include
•Program counter: Contains the address of the next instruction to be fetched
•Condition codes: Result of the most recent arithmetic or logical operation (e.g., sign, zero, carry, equal, overflow)
•Status information: Includes interrupt enabled/disabled flags, execution mode
Stack Pointers
Each process has one or more last-in-first-out (LIFO) system stacks associated with it. A stack is used to store parameters and calling addresses for procedure and system calls. The stack pointer points to the top of the stack.
Table 3.5 Typical Elements of a Process Control Block (page 2 of 2)
Process Control Information
Scheduling and State Information
This is information that is needed by the operating system to perform its scheduling function. Typical items of information:
•Process state: Defines the readiness of the process to be scheduled for execution (e.g., running, ready, waiting, halted).
•Priority: One or more fields may be used to describe the scheduling priority of the process. In some systems, several values are required (e.g., default, current, highest-allowable)
•Scheduling-related information: This will depend on the scheduling algorithm used. Examples are the amount of time that the process has been waiting and the amount of time that the process executed the last time it was running.
•Event: Identity of event the process is awaiting before it can be resumed.
Data Structuring
A process may be linked to other process in a queue, ring, or some other structure. For example, all processes in a waiting state for a particular priority level may be linked in a queue. A process may exhibit a parent-child (creator-created) relationship with another process. The process control block may contain pointers to other processes to support these structures.
Interprocess Communication
Various flags, signals, and messages may be associated with communication between two independent processes. Some or all of this information may be maintained in the process control block.
Process Privileges
Processes are granted privileges in terms of the memory that may be accessed and the types of instructions that may be executed. In addition, privileges may apply to the use of system utilities and services.
Memory Management
This section may include pointers to segment and/or page tables that describe the virtual memory assigned to this process.
Resource Ownership and Utilization
Resources controlled by the process may be indicated, such as opened files. A history of utilization of the processor or other resources may also be included; this information may be needed by the scheduler.
Table 3.6 Pentium EFLAGS Register Bits
| Control Bits
AC (Alignment check) Set if a word or doubleword is addressed on a nonword or nondoubleword boundary.
ID (Identification flag) If this bit can be set and cleared, this processor supports the CPUID instruction. This instruction provides information about the vendor, family, and model.
RF (Resume flag) Allows the programmer to disable debug exceptions so that the instruction can be restarted after a debug exception without immediately causing another debug exception.
IOPL (I/O privilege level) When set, causes the processor to generate an exception on all accesses to I/O devices during protected mode operation.
DF (Direction flag) Determines whether string processing instructions increment or decrement the 16-bit half-registers SI and DI (for 16-bit operations) or the 32-bit registers ESI and EDI (for 32-bit operations).
IF (Interrupt enable flag) When set, the processor will recognize external interrupts.
TF (Trap flag) When set, causes an interrupt after the execution of each instruction. This is used for debugging. Operating Mode Bits
NT (Nested task flag) Indicates that the current task is nested within another task in protected mode operation. |
VM (Virtual 8086 mode) Allows the programmer to enable or disable virtual 8086 mode, which determines whether the processor runs as an 8086 machine.
VIP (Virtual interrupt pending) Used in virtual 8086 mode to indicate that one or more interrupts are awaiting service.
VIF (Virtual interrupt flag) Used in virtual 8086 mode instead of IF.
Condition Codes
AF (Auxiliary carry flag) Represents carrying or borrowing between half-bytes of an 8-bit arithmetic or logic operation using the AL register.
CF (Carry flag) Indicates carrying out or borrowing into the leftmost bit position following an arithmetic operation. Also modified by some of the shift and rotate operations.
OF (Overflow flag) Indicates an arithmetic overflow after an addition or subtraction.
PF (Parity flag) Parity of the result of an arithmetic or logic operation. 1 indicates even parity; 0 indicates odd parity.
SF (Sign flag) Indicates the sign of the result of an arithmetic or logic operation.
ZF (Zero flag) Indicates that the result of an arithmetic or logic operation is 0. |
Table 3.7 Typical Functions of an Operating System Kernel
Process Management
•Process creation and termination
•Process scheduling and dispatching
•Process switching
•Process synchronization and support for interprocess communication
•Management of process control blocks
Memory Management
•Allocation of address space to processes
•Swapping
•Page and segment management
I/O Management
•Buffer management
•Allocation of I/O channels and devices to processes
Support Functions
•Interrupt handling
•Accounting
•Monitoring
Table 3.8 Mechanisms for Interrupting the Execution of a Process
| Mechanism | Cause | Use |
| Interrupt | External to the execution of the current instruction | Reaction to an asynchronous external event |
| Trap | Associated with the execution of the current instruction | Handling of an error or an exception condition |
| Supervisor call | Explicit request | Call to an operating system function |
Table 3.9 UNIX Process States
User Running Executing in user mode.
Kernel Running Executing in kernel mode.
Ready to Run, in Memory Ready to run as soon as the kernel schedules it.
Asleep in Memory Unable to execute until an event occurs; process is in main memory (a blocked state).
Ready to Run, Swapped Process is ready to run, but the swapper must swap the process into main memory before the kernel can schedule it to execute.
Sleeping, Swapped The process is awaiting an event and has been swapped to secondary storage (a blocked state).
Preempted Process is returning from kernel to user mode, but the kernel preempts it and does a process switch to schedule another process.
Created Process is newly created and not yet ready to run.
Zombie Process no longer exists, but it leaves a record for its parent process to collect.
Table 3.10 UNIX Process Image
| User-Level Context
Process text Executable machine instructions of the program Process data Data accessible by the program of this process User stack Contains the arguments, local variables, and pointers for functions executing in user mode Shared memory Memory shared with other processes, used for interprocess communication |
| Register Context
Program counter Address of next instruction to be executed; may be in kernel or user memory space of this process Processor status register Contains the hardware status at the time of preemption; contents and format are hardware dependent Stack pointer Points to the top of the kernel or user stack, depending on the mode of operation at the time or preemption General-purpose registers Hardware dependent |
| System-Level Context
Process table entry Defines state of a process; this information is always accessible to the operating system U (user) area Process control information that needs to be accessed only in the context of the process Per process region table Defines the mapping from virtual to physical addresses; also contains a permission field that indicates the type of access allowed the process: read-only, read-write, or read-execute Kernel stack Contains the stack frame of kernel procedures as the process executes in kernel mode |
Table 3.11 UNIX Process Table Entry
Process status Current state of process.
Pointers To U area and process memory area (text, data, stack).
Process size Enables the operating system to know how much space to allocate the process.
User identifiers The real user ID identifies the user who is responsible for the running process. The effective user ID may be used by a process to gain temporary privileges associated with a particular program; while that program is being executed as part of the process, the process operates with the effective user ID.
Process identifiers ID of this process; ID of parent process. These are set up when the process enters the Created state during the fork system call.
Event descriptor Valid when a process is in a sleeping state; when the event occurs, the process is transferred to a ready-to-run state.
Priority Used for process scheduling.
Signal Enumerates signals sent to a process but not yet handled.
Timers Include process execution time, kernel resource utilization, and user-set timer used to send alarm signal to a process.
P_link Pointer to the next link in the ready queue (valid if process is ready to execute).
Memory status Indicates whether process image is in main memory or swapped out. If it is in memory, this field also indicates whether it may be swapped out or is temporarily locked into main memory.
Table 3.12 UNIX U Area
Process table pointer Indicates entry that corresponds to the U area.
User identifiers Real and effective user IDs. Used to determine user privileges.
Timers Record time that the process (and its descendants) spent executing in user mode and in kernel mode.
Signal-handler array For each type of signal defined in the system, indicates how the process will react to receipt of that signal (exit, ignore, execute specified user function).
Control terminal Indicates login terminal for this process, if one exists.
Error field Records errors encountered during a system call.
Return value Contains the result of system calls.
I/O parameters Describe the amount of data to transfer, the address of the source (or target) data array in user space, and file offsets for I/O.
File parameters Current directory and current root describe the file system environment of the process.
User file descriptor table Records the files the process has opened.
Limit fields Restrict the size of the process and the size of a file it can write.
Permission modes fields Mask mode settings on files the process creates.
Table 3.13 VAX/VMS Process States
| Process State | Process Condition |
| Currently Executing | Running process. |
| Computable (resident) | Ready and resident in main memory. |
| Computable (outswapped) | Ready, but swapped out of main memory. |
| Page Fault Wait | Process has referenced a page not in main memory and must wait for the page to be read in. |
| Collided Page Wait | Process has referenced a shared page that is the cause of an existing page fault wait in another process, or a private page that is in the process of being read in or written out. |
| Common Event Wait | Waiting for shared event flag (event flags are single-bit interprocess signaling mechanisms). |
| Free Page Wait | Waiting for a free page in main memory to be added to the collection of pages in main memory devoted to this process (the working set of the process). |
| Hibernate Wait (resident) | Process puts itself in a wait state. |
| Hibernate Wait (outswapped) | Hibernating process is swapped out of main memory. |
| Local Event Wait (resident) | Process in main memory and waiting for local event flag (usually I/O completion). |
| Local Event Wait (outswapped) | Process in local event wait is swapped out of main memory. |
| Suspended Wait (resident) | Process is put into a wait state by another process. |
| Suspended Wait (outswapped) | Suspended process is swapped out of main memory. |
| Resource Wait | Process waiting for miscellaneous system resource |
SOLUTIONS MANUAL
Operating Systems: Internals and Design Principles
Seventh Edition
Chapters 1–9
William Stallings
Copyright 2011: William Stallings
© 2011 by William Stallings
All rights reserved. No part of this document may be reproduced, in any form or by any means, or posted on the Internet, without permission in writing from the author. Selected solutions may be shared with students, provided that they are not available, unsecured, on the Web.
Notice
This manual contains solutions to the review questions and homework problems in Data and Computer Communications, Ninth Edition. If you spot an error in a solution or in the wording of a problem, I would greatly appreciate it if you would forward the information via email to ws@shore.net. An errata sheet for this manual, if needed, is available at http://www.box.net/shared/fa8a0oyxxl. File name is S-OS7e-mmyy.
W.S.
| TABLE OF CONTENTS |
Chapter 1 Computer System Overview................................... 5
Chapter 2 Operating System Overview................................. 12
Chapter 3 Process Description and Control............................ 15
Chapter 4 Threads.............................................................. 20
Chapter 5 Mutual Exclusion and Synchronization................... 24
Chapter 6 Deadlock and Starvation...................................... 40
Chapter 7 Memory Management........................................... 52
Chapter 8 Virtual Memory.................................................... 58
Chapter 9 Uniprocessor Scheduling...................................... 67
Chapter 1 Computer System Overview
Answers to Questions
1.2 User-visible registers: Enable the machine- or assembly-language programmer to minimize main memory references by optimizing register use. For high-level languages, an optimizing compiler will attempt to make intelligent choices of which variables to assign to registers and which to main memory locations. Some high-level languages, such as C, allow the programmer to suggest to the compiler which variables should be held in registers. Control and status registers: Used by the processor to control the operation of the processor and by privileged, operating system routines to control the execution of programs.
1.3 These actions fall into four categories: Processor-memory: Data may be transferred from processor to memory or from memory to processor. Processor-I/O: Data may be transferred to or from a peripheral device by transferring between the processor and an I/O module. Data processing: The processor may perform some arithmetic or logic operation on data. Control: An instruction may specify that the sequence of execution be altered.
1.4 An interrupt is a mechanism by which other modules (I/O, memory) may interrupt the normal sequencing of the processor.
1.5 Two approaches can be taken to dealing with multiple interrupts. The first is to disable interrupts while an interrupt is being processed. A second approach is to define priorities for interrupts and to allow an interrupt of higher priority to cause a lower-priority interrupt handler to be interrupted.
1.6 The three key characteristics of memory are cost, capacity, and access time.
1.7 Cache memory is a memory that is smaller and faster than main memory and that is interposed between the processor and main memory. The cache acts as a buffer for recently used memory locations.
1.8 Programmed I/O: The processor issues an I/O command, on behalf of a process, to an I/O module; that process then busy-waits for the operation to be completed before proceeding. Interrupt-driven I/O: The processor issues an I/O command on behalf of a process, continues to execute subsequent instructions, and is interrupted by the I/O module when the latter has completed its work. The subsequent instructions may be in the same process, if it is not necessary for that process to wait for the completion of the I/O. Otherwise, the process is suspended pending the interrupt and other work is performed. Direct memory access (DMA): A DMA module controls the exchange of data between main memory and an I/O module. The processor sends a request for the transfer of a block of data to the DMA module and is interrupted only after the entire block has been transferred.
1.9 Spatial locality refers to the tendency of execution to involve a number of memory locations that are clustered. Temporal locality refers to the tendency for a processor to access memory locations that have been used recently.
1.10 Spatial locality is generally exploited by using larger cache blocks and by incorporating prefetching mechanisms (fetching items of anticipated use) into the cache control logic. Temporal locality is exploited by keeping recently used instruction and data values in cache memory and by exploiting a cache hierarchy.
Answers to Problems
1.1 Memory (contents in hex): 300: 3005; 301: 5940; 302: 7006
Step 1: 3005 ® IR; Step 2: 3 ® AC
Step 3: 5940 ® IR; Step 4: 3 + 2 = 5 ® AC
Step 5: 7006 ® IR; Step 6: AC ® Device 6
1.2 1. a. The PC contains 300, the address of the first instruction. This value is loaded in to the MAR.
b. The value in location 300 (which is the instruction with the value 1940 in hexadecimal) is loaded into the MBR, and the PC is incremented. These two steps can be done in parallel.
c. The value in the MBR is loaded into the IR.
2. a. The address portion of the IR (940) is loaded into the MAR.
b. The value in location 940 is loaded into the MBR.
c. The value in the MBR is loaded into the AC.
3. a. The value in the PC (301) is loaded in to the MAR.
b. The value in location 301 (which is the instruction with the value 5941) is loaded into the MBR, and the PC is incremented.
c. The value in the MBR is loaded into the IR.
4. a. The address portion of the IR (941) is loaded into the MAR.
b. The value in location 941 is loaded into the MBR.
c. The old value of the AC and the value of location MBR are added and the result is stored in the AC.
5. a. The value in the PC (302) is loaded in to the MAR.
b. The value in location 302 (which is the instruction with the value 2941) is loaded into the MBR, and the PC is incremented.
c. The value in the MBR is loaded into the IR.
6. a. The address portion of the IR (941) is loaded into the MAR.
b. The value in the AC is loaded into the MBR.
c. The value in the MBR is stored in location 941.
1.3 a. 224 = 16 MBytes
b. (1) If the local address bus is 32 bits, the whole address can be transferred at once and decoded in memory. However, since the data bus is only 16 bits, it will require 2 cycles to fetch a 32-bit instruction or operand.
(2) The 16 bits of the address placed on the address bus can't access the whole memory. Thus a more complex memory interface control is needed to latch the first part of the address and then the second part (since the microprocessor will end in two steps). For a 32-bit address, one may assume the first half will decode to access a "row" in memory, while the second half is sent later to access a "column" in memory. In addition to the two-step address operation, the microprocessor will need 2 cycles to fetch the 32 bit instruction/operand.
c. The program counter must be at least 24 bits. Typically, a 32-bit microprocessor will have a 32-bit external address bus and a 32-bit program counter, unless on-chip segment registers are used that may work with a smaller program counter. If the instruction register is to contain the whole instruction, it will have to be 32-bits long; if it will contain only the op code (called the op code register) then it will have to be 8 bits long.
1.4 In cases (a) and (b), the microprocessor will be able to access 216 = 64K bytes; the only difference is that with an 8-bit memory each access will transfer a byte, while with a 16-bit memory an access may transfer a byte or a 16-byte word. For case (c), separate input and output instructions are needed, whose execution will generate separate "I/O signals" (different from the "memory signals" generated with the execution of memory-type instructions); at a minimum, one additional output pin will be required to carry this new signal. For case (d), it can support 28 = 256 input and 28 = 256 output byte ports and the same number of input and output 16-bit ports; in either case, the distinction between an input and an output port is defined by the different signal that the executed input or output instruction generated.
1.5 Clock cycle = 
Bus cycle = 4 ´ 125 ns = 500 ns
2 bytes transferred every 500 ns; thus transfer rate = 4 MBytes/sec
Doubling the frequency may mean adopting a new chip manufacturing technology (assuming each instructions will have the same number of clock cycles); doubling the external data bus means wider (maybe newer) on-chip data bus drivers/latches and modifications to the bus control logic. In the first case, the speed of the memory chips will also need to double (roughly) not to slow down the microprocessor; in the second case, the "word length" of the memory will have to double to be able to send/receive 32-bit quantities.
1.6 a. Input from the Teletype is stored in INPR. The INPR will only accept data from the Teletype when FGI=0. When data arrives, it is stored in INPR, and FGI is set to 1. The CPU periodically checks FGI. If FGI =1, the CPU transfers the contents of INPR to the AC and sets FGI to 0.
When the CPU has data to send to the Teletype, it checks FGO. If FGO = 0, the CPU must wait. If FGO = 1, the CPU transfers the contents of the AC to OUTR and sets FGO to 0. The Teletype sets FGI to 1 after the word is printed.
b. The process described in (a) is very wasteful. The CPU, which is much faster than the Teletype, must repeatedly check FGI and FGO. If interrupts are used, the Teletype can issue an interrupt to the CPU whenever it is ready to accept or send data. The IEN register can be set by the CPU (under programmer control)
1.7 If a processor is held up in attempting to read or write memory, usually no damage occurs except a slight loss of time. However, a DMA transfer may be to or from a device that is receiving or sending data in a stream (e.g., disk or tape), and cannot be stopped. Thus, if the DMA module is held up (denied continuing access to main memory), data will be lost.
1.8 Let us ignore data read/write operations and assume the processor only fetches instructions. Then the processor needs access to main memory once every microsecond. The DMA module is transferring characters at a rate of 1200 characters per second, or one every 833 µs. The DMA therefore "steals" every 833rd cycle. This slows down the processor approximately 
1.9 a. The processor can only devote 5% of its time to I/O. Thus the maximum I/O instruction execution rate is 106 ´ 0.05 = 50,000 instructions per second. The I/O transfer rate is therefore 25,000 words/second.
b. The number of machine cycles available for DMA control is
106(0.05 ´ 5 + 0.95 ´ 2) = 2.15 ´ 106
If we assume that the DMA module can use all of these cycles, and ignore any setup or status-checking time, then this value is the maximum I/O transfer rate.
1.10 a. A reference to the first instruction is immediately followed by a reference to the second.
b. The ten accesses to a[i] within the inner for loop which occur within a short interval of time.
Chapter 2 – Operating System Overview
TRUE/FALSE QUESTIONS:
1)
An OS should be constructed in such a way as to permit the effective development, testing, and introduction of new system functions without interfering with service.
Answer:
True
False
2)
The OS masks the details of the hardware from the programmer and provides the programmer with a convenient interface for using the system.
Answer:
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True
False
3)
The ABI gives a program access to the hardware resources and services available in a system through the user ISA.
Answer:
True
![clip_image002[2]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhSpOFeqIIHNLjXnQaEOoz0zrXBQtaJOVllLo7Oa8SKc-pKFqvKG76iI6TKgPpoINPwSDnWD2217WUjE0xaHXoAnSvOtc9nCm7RfUMc8e7adHPEgVVQk_nX7yaKD1e1Wz7mJPbGCS2RxmM/s1600-h/clip_image002%25255B2%25255D%25255B2%25255D.jpg "clip_image002[2]"){kind=small}
False
4)
The OS frequently relinquishes control and must depend on the processor to allow it to regain control.
Answer:
![clip_image002[3]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi6jAm7DblAqpBTi5SjUOhGL2iTz7PR9UkcSRuQDlpom6Qz7A51v-G_rXWbxg4NYVYhIVnSxIevex-bGJHqNSEMpHWzCqOBEFNWu0RoDldiCmEgyDp7r-rRdhqWIcHgYCpefUKN-rrnJT0/s1600-h/clip_image002%25255B3%25255D%25255B2%25255D.jpg "clip_image002[3]"){kind=small}
True
False
5)
One of the driving forces in operating system evolution is advancement in the underlying hardware technology.
Answer:
![clip_image002[4]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgeULlH8N39lmt6sJmy_0emomHDakF80juhNGcjVID3trsPjimEggGeja5pl4Y0HDDqqHF5V5u2rPUx7UA6u5corz7QhOlKljKVrlQzAvHj7BjPVMtWks_rUEzn31AAgamasbzAK2nig8c/s1600-h/clip_image002%25255B4%25255D%25255B2%25255D.jpg "clip_image002[4]"){kind=small}
True
False
6)
The processor itself is not a resource so the OS is not involved in determining how much of the processor time is devoted to the execution of a user program.
Answer:
True
![clip_image002[5]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjMBQlA47uU-oHiGkrZvYYqJlWo4bwV62j7zps9rVUjAO8YHsdm2rSRoOg5lMV2m34b7gcWwTH_Hdg83wZwDhB60J9bcum3bH29kbC9irZ6CPgvpM7rpHEC4S55oWb-X6zJCvPXFOIboys/s1600-h/clip_image002%25255B5%25255D%25255B2%25255D.jpg "clip_image002[5]"){kind=small}
False
7)
A process consists of three components: an executable program, the associated data needed by the program, and the execution context of the program.
Answer:
![clip_image002[6]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjd3gHyRfeEpy86xZc8qEi7HwwZvabq-y06oB8wx0megYVjAtxC1Vngl5TIOvb-1icfmHQnoHwGOws7YxKAvzZLbvEtjamYmrNwpUzujH8KVEB1LQw3cmYc_jZSST02rYPULmzcDiJkgo0/s1600-h/clip_image002%25255B6%25255D%25255B2%25255D.jpg "clip_image002[6]"){kind=small}
True
False
8)
Uniprogramming typically provides better utilization of system resources than multiprogramming.
Answer:
True
![clip_image002[7]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj9tEBmXHI6lCwlGWBDT0CJdr0zY7aRiRbcqCG0zOh8GEw1Km1DhBRGUWd94raUfXAc6ydfMGAlase_XCTswnEASvzzaNlQpTwhB3bxtPq7-c25gJm_2fRzfPqYpMA0B6drGGaKki3POoI/s1600-h/clip_image002%25255B7%25255D%25255B2%25255D.jpg "clip_image002[7]"){kind=small}
False
9)
A monolithic kernel is implemented as a single process with all elements sharing the same address space.
Answer:
![clip_image002[8]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiXEFZ8uWS59p3BM3sT-Lpd4Txyr_RT23egFiRqFsgRP4KLLocXXaa9bQwaZfuwXZYj-h1q4_Bhq3E9dCsNTYgCFx2KaHSNAMwuhykhp5-ea5JmJIzQkH6j-NHEUGQHI4gVbYU2h74ilmY/s1600-h/clip_image002%25255B8%25255D%25255B2%25255D.jpg "clip_image002[8]"){kind=small}
True
False
10)
The user has direct access to the processor with a batch-processing type of OS.
Answer:
True
![clip_image002[9]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEje-2qC_XaUN7n0FrSc6z1kNHV1RZIz9WG9wTRHjBcxnrXsRbW-RQxFe8f0NYZBfCot4NDQGendMZbfOHLzPuTZ-cwI_B_C85DRxGSSOHXGOrhNrjSM1u43cX9gENfQFvUca8CaCKN85ws/s1600-h/clip_image002%25255B9%25255D%25255B2%25255D.jpg "clip_image002[9]"){kind=small}
False
11)
Both batch processing and time sharing use multiprogramming.
Answer:
![clip_image002[10]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgdJshiHvNEE2PNrSp7giW6fHdSI9Pk0Oj5ZLi2bNKPeazgS8W-dCZcDGBlRNzlIg_Zpmd21QWJJ3LGpa4OiElU4E7Qp7c8gtZ5wTsAc7K7WlxLyrDEmBsN_T_LAMy_S1K_PJl8s2ojj20/s1600-h/clip_image002%25255B10%25255D%25255B2%25255D.jpg "clip_image002[10]"){kind=small}
True
False
12)
The phrase "control is passed to a job" means that the processor is now fetching and executing instructions from the monitor program.
Answer:
True
![clip_image002[11]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEidD0mUCpm5VY6zSiX_M7uWfWxJ-jHCWRLmRAcONUm9S_HwgzQh96c5n-H5U83_-93npF2oPldfCmsF9OKT5BCsDEVWTZ9qWlZeKGLsonk_m-OKVAsFUU-h5VaCaK83sJw7AGJB7jbVMDg/s1600-h/clip_image002%25255B11%25255D%25255B2%25255D.jpg "clip_image002[11]"){kind=small}
False
13)
In a time sharing system, a user's program is preempted at regular intervals, but due to relatively slow human reaction time this occurrence is usually transparent to the user.
Answer:
![clip_image002[12]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgI8GCbR0BtsQDqKZ2X3awyMLJnsmC1VNKIW3XQJalPsmpIG6HE2ibBVpKhh3P6kU2jmq9Nh54GMGFR6df54MEbgE2nLvhg73XPvLflwBCcT0oRuFa9fG-igbUACNhlTcERmsAo2pcY75U/s1600-h/clip_image002%25255B12%25255D%25255B2%25255D.jpg "clip_image002[12]"){kind=small}
True
False
14)
The principle objective of Batch Multiprogramming is to minimize response time.
Answer:
True
![clip_image002[13]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiqu3-IUGhWHwAUM0f4VCvOE7M1kxD_fWMmcFhU9kMfZfDHMM3nHBl5ZUiNj4Bdck_jtTaFqT6Dv5wvRIxqhEv9tG7qLuqoGFT3XjNovjCHCcO2XXxXyaQYNGGtuMfu5Egq0kYgzfyPzLw/s1600-h/clip_image002%25255B13%25255D%25255B2%25255D.jpg "clip_image002[13]"){kind=small}
False
15)
Virtualization technology enables a single PC or server to simultaneously run multiple operating systems or multiple sessions of a single OS.
Answer:
![clip_image002[14]](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjWonHVpfXVTnUyPVDokOsIw-lPNsBmVyvQgQOoUNhaYMUL_H2YWTHNM5PYrU08SylQKIImnR5EPAIQkyFl0tyzCJQv2rwZy-kHJQnnazJz7xTBj4hn40galKwqjbCw-jpnfOcfLh3SWdc/s1600-h/clip_image002%25255B14%25255D%25255B2%25255D.jpg "clip_image002[14]"){kind=small}
True
False
MULTIPLE CHOICE QUESTIONS:
1)
The __________ is the interface that is the boundary between hardware and software.
A)
ABI
B)
ISA
C)
IAS
D)
API
Answer:
B
2)
A(n) __________ is a set of resources for the movement, storage, and processing of data and for the control of these functions.
A)
architecture
B)
program
C)
computer
D)
application
Answer:
C
3)
The operating system's __________ refers to its inherent flexibility in permitting functional modifications to the system without interfering with service.
A)
efficiency
B)
ability to evolve
C)
controlled access
D)
convenience
Answer:
B
4)
Operating systems must evolve over time because:
A)
new hardware is designed and implemented in the computer system
B)
hardware must be replaced when it fails
C)
hardware is hierarchical
D)
users will only purchase software that has a current copyright date
Answer:
A
5)
A special type of programming language used to provide instructions to the monitor is __________ .
A)
FPL
B)
JCL
C)
DML
D)
SML
Answer:
B
6)
Hardware features desirable in a batch-processing operating system include memory protection, timer, privileged instructions, and __________ .
A)
clock cycles
B)
associated data
C)
interrupts
D)
kernels
Answer:
C
7)
A user program executes in a __________ , in which certain areas of memory are protected from the user's use, and in which certain instructions may not be executed.
A)
kernel mode
B)
user mode
C)
task mode
D)
batch mode
Answer:
B
8)
Multiprogramming operating systems are fairly sophisticated compared to single-program or _________ systems.
A)
uniprogramming
B)
time-sharing
C)
multitasking
D)
memory management
Answer:
A
9)
One of the first time-sharing operating systems to be developed was the __________ .
A)
Compatible Time-Sharing System
B)
Real Time Transaction System
C)
Multiple-Access System
D)
Multiprogramming Operation System
Answer:
A
10)
The technique where a system clock generates interrupts, and at each clock interrupt the OS regains control and assigns the processor to another user, is __________ .
A)
time slicing
B)
multithreading
C)
round robin
D)
clock cycle
Answer:
A
11)
The __________ is the internal data by which the OS is able to supervise and control the process.
A)
executable program
B)
associated data
C)
nucleus
D)
execution context
Answer:
D
12)
__________ is where the OS must prevent independent processes from interfering with each other's memory, both data and instructions.
A)
Support of modular programming
B)
Process isolation
C)
Automatic allocation and management
D)
Protection and access control
Answer:
B
13)
__________ is concerned with the proper verification of the identity of users and the validity of messages or data.
A)
Availability
B)
Confidentiality
C)
Authenticity
D)
Data integrity
Answer:
C
14)
A common strategy to give each process in the queue some time in turn is referred to as a __________ technique.
A)
multithreading
B)
round-robin
C)
time slicing
D)
serial processing
Answer:
B
15)
The key to the success of Linux has been its character as a free software package available under the auspice of the ___________ .
A)
World Wide Web Consortium
B)
Free Software Foundation
C)
Berkeley Software Distribution
D)
GNU Public License
Answer:
B
SHORT ANSWER QUESTIONS:
1)
An __________ is a program that controls the execution of application programs and acts as an interface between applications and the computer hardware.
Answer:
operating system (OS)
2)
The portion of the monitor that is always in main memory and available for execution is referred to as the _________ .
Answer:
resident monitor
3)
__________ is a technique in which a process, executing an application, is divided into threads that can run concurrently.
Answer:
Multithreading
4)
Two major problems with early serial processing systems were scheduling and __________ .
Answer:
setup time
5)
The central idea behind the simple batch-processing scheme is the use of a piece of software known as the _________ .
Answer:
monitor
6)
Any resource allocation and scheduling policy must consider three factors: Fairness, Differential responsiveness, and __________ .
Answer:
Efficiency
7)
A __________ is set at the beginning of each job to prevent any single job from monopolizing the system.
Answer:
timer
8)
The OS has five principal storage management responsibilities: process isolation, automatic allocation and management, support of modular programming, protection and access control, and __________ .
Answer:
long-term storage
9)
The earliest computers employed __________ processing, a name derived by the way the users have access to the systems.
Answer:
serial
10)
__________ was designed to keep the processor and I/O devices, including storage devices, simultaneously busy to achieve maximum efficiency.
Answer:
Multiprogramming
11)
In a time-sharing, multiprogramming system, multiple users simultaneously access the system through __________ .
Answer:
terminals
12)
The principal objective of __________ is to maximize processor use.
Answer:
Batch Multiprogramming
13)
Three major lines of computer system development created problems in timing and synchronization that contributed to the development of the concept of the process: multiprogramming batch operation, time sharing, and __________ .
Answer:
real-time transaction systems
14)
___________ is a facility that allows programs to address memory from a logical point of view, without regard to the amount of main memory physically available.
Answer:
Virtual memory
15)
Security and protection as it relates to operating systems is grouped into four categories: Availability, Data integrity, Authenticity, and __________ .
Answer:
Confidentiality
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